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ELASTIC will develop a software architecture incorporating a new elasticity concept that will enable smart systems to satisfy the performance requirements of extreme-scale analytics workloads. These new elasticity concept will efficiently distribute the workloads across the compute continuum, whilst guaranteeing real-time, energy, communication quality and security non-function properties inherited from the system domain. The vision of ELASTIC is that by extending the elasticity concept across the compute continuum in a fog computing environment, combined with the usage of advanced hardware architectures at the edge side, can significantly increase the capabilities of the extreme-scale analytics integrating both responsive data-in-motion and latent data-at-rest analytics into a single solution
ELASTIC is a Research and Innovation (RIA) project within the Horizon 2020 Programme of the European Union.

Participants: Barcelona Supercomputing Center (Spain), Ikerlan (Spain), Instituto Superior de Engenharia do Porto (Portugal), Information Catalyst for Enterprise (UK), Thales (France and Italy), SixSQ (Switzerland), GEST (Italy), Citta Metropolitana di Firenze (Italy).

High Performance Parallel Payload Processing for Space
2018 - 2019
This projects extends the research activities conducted in the "Parallel Programming Models for Space Systems" ESA ITI project to further investigate the benefits of OpenMP in a more realistic space system, composed of real space payload use-cases and parallel computing platforms.
This project is an ESA contract from the Innovation Triangle Initiative framework (Demonstrator type)

Participants: Barcelona Supercomputing Center (Spain), Airbus Defense and Space (France)

CLASS CLASS project, whose objective is to develop a novel software architecture to help big data developers to fully benefit from a combined data-in-motion and data-at-rest analytics by efficiently distributing data and process mining along the compute continuum (from edge to cloud resources) in a complete and transparent way, while providing sound real-time guarantees imposed by autonomous vehicles. The capabilities of this novel software architecture will be demonstrated on a real smart-city use case in the city of Modena, featuring a heavy sensor infrastructure to collect real-time data across a wide urban area, and prototype cars provided by Maserati and equipped with heterogeneous sensors/actuators, V2C, V2I and V2V connectivity.
CLASS is a Research and Innovation (RIA) project within the Horizon 2020 Programme of the European Union.

Participants: Barcelona Supercomputing Center (Spain), University of Modena (Italy), City of Modena (Italy), Maserati (Italy), IBM (Israel), ATOS Spain S.L. (Spain).

Increasing the Guaranteed Performance in Many-core Heterogeneous Architectures, 2016 - 2017
Many-core heterogeneous architectures are rapidly evolving, providing to embedded systems an unprecedented level of performance required to cope with current and future system challenges. However, in order to efficiently exploit the massively parallel computation capabilities of these architectures, it is mandatory to tame the complexity of parallel programming.
This project investigates parallel programming models, scheduling and timing estimation techniques to obtain a high-performance and tight response-time bounds of parallel computation. The proposed approach is to be demonstrated on automotive Advances Driver Assistance Systems (ADAS).

Participants: Barcelona Supercomputing Center (Spain), DENSO AUTOMOTIVE Deutschland GmbH (Germany)

Parallel Programming Models for Space Systems
(ESA Contract No. 4000114391/15/NL/Cbi/GM) 2015 - 2016
This projects aims to demonstrate the benefits of using OpenMP v4.0 tasking model in space systems in order to improve performance speed-up and increase programmability, while still providing timing analyzability. To do so, this project will identify the challenges that future implementations of OpenMP4 must address so it can be applied to space systems.
This project is an ESA contract from the Innovation Triangle Initiative framework (proof-of-concept type)

Participants: Barcelona Supercomputing Center (Spain), Evidence Srl (Italy)

P-SOCRATES proposes an integrated framework for executing workload-intensive parallel applications with real-time requirements on top of next-generation commercial-off-the-shelf (COTS) platforms based on many-core accelerated architectures. The project will investigate new HPC techniques that fulfil real-time requirements. The main sources of indeterminism will be identified, proposing efficient mapping and scheduling algorithms, along with the associated timing and schedulability analysis, to guarantee the real-time and performance requirements of the applications.
P-SOCRATES is a STREP project within the Seventh Framework Programme of the European Union.

Participants: Instituto Superior de Engenharia do Porto (Portugal), Barcelona Supercomputing Center (Spain), University of Modena (Italy), ETH Zurich (Switzerland), Evidence Srl (Italy), Active Technologies Srl (Italy), ATOS Spain S.L. (Spain).

P4S (Probabilistically Analyzable Real-Time Systems for Space) 2014 - 2015
P4S addresses issues related to time analysability of next generation space systems. The key challenge is the use multicores in an effective way while achieving adequate levels of guarantee of the timing correctness. Probabilistic timing analysis techniques enable the determination of WCET estimations of software components to arbitrary levels of probability that the execution time is not exceeded. To do so, the software timing has to be randomised, which can be done by hardware and/or software randomisation techniques.
P4S is a European Space Agency (ESA) study proposal, in response to the ITT Ref AO/1- 7646/13/NL/JK, published by EMITS on the 9th of August 2013.

Participants: Rapita Systems (UK), Barcelona Supercomputing Center (Spain), University of Padua (Italy), Airbus Defense and Space (France), Aeroflex Gaisler (Sweden).

The PROXIMA thesis is that the temporal behaviour of mixed-criticality CRTES executing on multi-core and many-core platforms can be analysed effectively via innovative probabilistic techniques. PROXIMA defines new hardware and software architectural paradigms based on the concept of randomisation. On top of this, PROXIMA builds a comprehensive suite of probabilistic analysis methods integrated into commercial design, development, and verification tools, complemented by appropriate arguments for certification.
PROXIMA is an IP project within the Seventh Framework Programme of the European Union.

Participants: Barcelona Supercomputing Center (Spain), University of Padua(Italy), Rapita Systems (UK), INRIA (France), Airbus (France), Sysgo (France), Infineon (France), University of York (UK), IKERLAN (Spain), Aeroflex Gaisler (Sweden), Astrium Satellites (France)

The motivation for the parMERASA project is the industry’s demands for new functionality and higher levels of performance of embedded hard real-time systems. The parMERASA project aims to develop a multi-core processor architecture that provides a predictable timing behaviour, a suitable system-level software, software design guidelines for parallelising hard real-time applications, and tools for estimating and verifying the timing behaviour of such parallel applications.
parMERASA is a STREP project within the Seventh Framework Programme of the European Union.

Participants: University of Augsburg (Germany), Barcelona Supercomputing Center (Spain), University Paul Sabatier (France), Technical University of Dortmund (Germany), Rapita Systems (UK), Honeywell (Chez Republic), Denso Automotive Deutschland (Germany), Bauer Maschinen (Germany).

The PROARTIS thesis is that the timing behaviour of systems that use advanced hardware features like multicore CPUs and complex memory hierarchies can be analysed effectively by probabilistic timing analysis techniques that reduce the risk of temporal pathological cases to quantifiably negligible levels.
PROARTIS is a STREP project within the Seventh Framework Programme of the European Union.

Participants: Barcelona Supercomputing Center (Spain), University of Padua(Italy), Rapita Systems (UK), INRIA (France), Airbus (France).

Architectural solutions for the timing predictability of next-generation multi-core processors (NPI ref. 132-2010) 2011 - 2014
The objective of this project is to enable a Worst Case Execution Time (WCET) analysis of time-critical tasks in a multi-core environment such as the New Generation Multi-Core Processor (NGMP). To do so, this project will study the impact that inter-task interferences have on the WCET, proposing new hardware mechanisms to control and bound such interferences and, hence, to provide the time analysability property to enable the computation of a safe and tight WCET estimation of critical tasks.

Participants: Barcelona Supercomputing Center (Spain), European Space Agency (ESA).

Multi-core OS Benchmarks (ITT RFQ AO/3-13153/10/NL/JK) 2011
The objective of this project is to define and develop a benchmark suite, representative of reference ESA applications (satellite on-board control applications and payload applications) suitable to exercise the new New Generation Multi-core Processor (NGMP), so the level of confidence on the design of the NGMP increases.

Participants: Barcelona Supercomputing Center (Spain), European Space Agency (ESA).

The MERASA project aims to develop multicore processor designs, from two to sixteen cores, for hard real-time embedded systems hand in hand with timing analysis techniques and tools to ensure the analyzability and predictability regarding timing of every single feature provided by the processor.
MERASA is a STREP project within the Seventh Framework Programme of the European Union.

Participants: University of Augsburg (Germany), Barcelona Supercomputing Center (Spain), University Paul Sabatier (France), Rapita Systems (UK), Honeywell (Chez Republic).

Power and Communication-Aware Microarchitectures (Intel) 2003 - 2006
ISA extensions are a very powerful approach to implement new hardware techniques that require or benefit from compiler support: decisions made at compile time can be complemented at runtime, achieveing a synergistic effect between the compiler and the processor. This project aims to exploit two well-known ISA extensions: predicate execution and register windows to dynamic scheduling processors

Participants: University Politecnic of Catalonia (Spain), Intel Labs Barcelona (Spain).